1. Field of the Invention
The present invention relates to a liquid crystal display panel which is used as a display panel in a liquid crystal TV and the like, more particularly, to a thin film transistor panel which uses thin film transistors as switching devices for causing pixels in the panel turn-ON and turn-OFF.
2. Description of the Related Art
A thin film transistor panel which is used in active matrix type liquid crystal display device for displaying television image and the like is formed by aligning a large number of transparent pixel electrodes and a large number of thin film transistors for driving the pixel electrodes in row and column directions on a transparent substrate. Gate and drain electrodes of the thin film transistors are connected to gates and data lines which are wired between columns of the pixel electrodes, and source electrodes are connected to the transparent pixel electrodes.
A panel which is formed by aligning thin film transistors and pixel electrodes in row is widely known as the thin film transistor panel. However, it was proposed recently that the panel is constructed by forming thin transistors on the transparent substrate, then forming transparent insulating film thereon and then forming transparent pixel electrodes on the transparent insulating film. When the transparent insulating film is formed between the thin film transistors and the pixel electrodes, aperture ratio of liquid crystal display device can be improved due to large area of pixel electrodes since the short-circuit between the pixel electrodes and the gates and data lines can be prevented by the transparent insulating film even if the distance there between is reduced.
FIG. 1 is a schematic sectional view showing part of the conventional thin film transistor panel in which thin film transistors and formed on the transparent substrate, and transparent pixel electrodes are formed on the transparent insulating film.
Referring to FIG. 1, reference numeral 1 denotes a transparent substrate (glass plate); and T1, a thin film transistor formed on the transparent substrate 1. Thin film transistor T1 includes gate electrode 2 formed on transparent substrate 1, transparent gate insulating film 3 formed on gate electrode 2 and substantially all over substrate 1, i(intrinsic)-a(amolphus)-Si semiconductor layer 4 formed opposite to gate electrode 2 on gate insulating film 3, and source electrode 6 and drain electrode 7 both formed on semiconductor layer 4 through n.sup.+ -a-Si layer 5. Gate electrode 2 is connected to the unshown gate line, and drain electrode 7 is connected the unshown data line. Flat surface transparent insulating film 8 composed of SOG (Spin On Glass) is formed substantially all over substrate 1 on which thin film transistor T1 has been formed. Transparent pixel electrode 10 is formed on transparent insulating film. Contact hole 9 is provided through transparent insulating film 8 correspondingly to source electrode 6. The edge portion of transparent pixel electrode 10 is formed so as to be overlapped contact hole 9. Electrode 10 is connected to the source electrode of thin film transistor T1 through contact metal 11 filled in contact hole 9.
The thin film transistor panel is manufactured by the following steps of: forming thin film transistors T1 on transparent substrate 1; forming transparent insulating film 8 thereon; providing contact holes 9 through transparent insulating film 8; despositing conductive metal on transparent insulating film 8 by plating or the like so as to fill contact metal 11 in contact hole 9; eliminating undesired portion of the metal film deposited on the surface of transparent insulating film 8 by etching; forming transparent conductive film composed of ITO and the like on transparent insulating film 8 by sputtering or the like; and then patterning the transparent conductive film so as to form transparent pixel electrodes 10.
However, in order to connect pixel electrodes 10 to source electrodes 6 of thin film transistors T1, the conventional thin film transistor panel has a drawback that a lot of steps of manufacturing the thin film transistor panel must be needed. Because, at first, conductive metal has to be deposited on transparent insulating film 8 so as to fill contact metal 11 in contact holes 9 and then transparent pixel electrodes 10 have to be formed on transparent insulating film 8 by eliminating undesired parts of the metal film on transparent insulating film 8 with etching. Furthermore, in case of connecting pixel electrodes 10 to source electrodes 6 by contact metal 11, it is necessary to fill completely contact holes 9 with contact metal 11 to the upper level (that is, to the surface of transparent insulating film 8) so as to connect securely pixel electrodes 10 to source electrodes 6. As a result, a metal used as contact metal 11 has to be deposited much thicker than the depth of contact holes 9 so as to deposite contact metals 11 in the whole depth of contact holes 9. It is preferable that transparent insulating film 8 may be constructed as thickly as possible in order to reduce the capacitance between pixel electrodes 10 and the gates and data lines under transparent insulating film 8. However, when transparent insulating film 8 is made to be thick, since the depth of contact holes 9 are provided through transparent insulating film 8, deposited thickness of the metal also become thick. In addition, in case a metal used as contact metal 11 is deposited on transparent insulting film 8 thickly, it takes a lot of time to deposit the metal and also it is difficult to eliminate the undesired metal film on transparent insulating film 8. Accordingly, the conventional thin film transistor panel has drawback that it is troublesome to manufacture the panel.
While, wirings of the thin film transistor panel are formed generally on the insulating film covering the thin film transistors and are connected to the electrodes of the thin film transistors through the contact holes provided through the insulating film.
FIG. 2 shows a part of a schematic sectional connecting structure of the wirings of the thin film transistor. More specifically, FIG. 2 shows a connecting structure of the wirings connected to the source and drain electrodes of an inveted stagger type thin film transistor. In FIG. 2, reference numeral 21 demotes an insulating substrate including a glass plate etc., and an inverted stagger type thin film transistor T2 is formed on insulating substrate 21. Inverted stagger type thin film transistor T2 is composed of gate electrode G formed on insulating substrate 21, gate insulating film 22 formed on gate electrode G, i-a-Si semiconductor layer 23 formed opposite to gate electrode G on gate insulating film 22, n.sup.+ -a-Si layers 24 corresponding to source and drain areas formed on semiconductor layer 23 with covering channel portion, and source electrode S and drain electrode D formed on n.sup.+ -a-Si layer 24. Gate electrode G is connected to the unshown gate line formed on substrate 21.
Insulating film 25 covering thin film transistor T2 is formed on substrate 21 on which thin film transistor T2 has been formed. Source electrode S and drain electrode D is connected to wirings 27 (source and drain wirings) formed on insulating film 25. Wirings 27 are formed by depositing metal such as Al on insulating film 25 by means of plating or sputtering, and then patterning the metal. The wiring metal is deposited to fill contact holes 26 which are formed correspondingly to source and drain electrodes S and D. Wirings 27 are connected to source electrode S and drain electrode D through contact metal layers 27a which is filled in contact hole 26.
The connecting structure of the wirings of the inverted stagger type thin film transistor is shown in FIG. 2. The wirings formed on the insulating film of stagger type, coplanar type and inverted coplanar type thin film transistors and also the transistor formed on the Si single crystal substrate are connected to the electrodes of the transistor in the same manner as described above.
However, in the connecting structure of the wirings of the thin film transistors, wirings 27 are connected to the electrodes (source and drain electrodes S and D in FIG. 2) of thin film transistors T2 through contact metal layers 27a. Therefore it is necessary to deposit the wiring metal satisfactorily thicker than the depth of contact holes 26 so as to connect certainly wirings 27 to the electrodes of thin film transistors T2. In general, deposited thickness of the wiring metal is set at almost two times of the depth of contact holes 26. It is preferable that insulating film 25 is formed as thickly as possible so as to reduce the capacitance between wirings 27 formed on film 25 and the gate wirings on substrate 21 and to prevent short-circuit between wirings 27 and the gate wirings. However, when insulating film 25 is formed thickly, the depth of contact holes 26 becomes large so that deposited thickness of the wiring metal also becomes large. As a result, the conventional connecting structure of wirings has the drawbacks that it requires a lot of time to deposit the wiring metal on insulating film 25, and that, when wiring 27 is formed by patterning the wiring metal film deposited on insulating film 25, the patterning of the wiring metal film is troublesome so that it is difficult to make wirings finely due to the large film thickness of the wiring metal film.